Introduction to KLayout

Satish Patel of PARI at Purdue University offers (6) instructional tutorials on KLayout.

Users walk through an example wafer design for a silicon interposer including test structures. This tutorial series starts from the basics of KLayout and works through the complete process of designing a hypothetical silicon interposer for thermal test chips while following PDK design rules.

Other lessons are below. Click on the link to be taken to the nanoHUB page for that tutorial.
KLayout Tutorial L1: Introduction to KLayout
KLayout Tutorial L2: Following PDK Design Rules
KLayout Tutorial L3: Layout for Pad Arrays
KLayout Tutorial L4: Working with Cells and Arrays
KLayout Tutorial L5: Designing Test Structures
KLayout Tutorial L6: Python Macro Development