Professor Mike Wirthlin of Brigham Young University delivered this lecture for the Introduction to Radiation Effects Engineering online SCALE course.
Soft errors in SRAM‑based field‑programmable gate arrays (FPGAs) arise when energetic particles deposit charge in the configuration memory that defines the device’s logic, routing, and embedded resources. Because modern FPGAs contain hundreds of megabits of volatile configuration RAM, even modest radiation environments can induce frequent upsets that jeopardize functional correctness, especially in safety‑critical and space‑borne systems. Understanding the mechanisms of these upsets is therefore essential for reliable digital hardware design.
The resource examines the internal architecture of SRAM FPGAs, detailing how lookup tables, flip‑flops, routing matrices, block RAM, and DSP blocks are programmed by a configuration bitstream stored in CRAM. It describes the physics of single‑event effects, including charge collection that flips stored bits and the resulting single‑event transients that may be latched by sequential elements. Quantitative metrics such as FIT (failures‑in‑time) per megabit are presented to illustrate the scaling of soft‑error rates with increasing device capacity. Mitigation strategies are explored, including error‑correcting codes (ECC) on configuration memory, periodic configuration scrubbing, spatial and temporal redundancy (e.g., triple modular redundancy), and the use of radiation‑hardened antifuse or flash technologies that inherently resist upsets.
Armed with this knowledge, learners can explain how radiation induces soft errors in SRAM‑based FPGAs, compare the effectiveness and trade‑offs of various mitigation approaches, and analyze how configuration‑memory upsets alter circuit behavior—such as changing routing paths or logic functions—and consequently impact system performance and reliability.